VLSI (PROPAGATION DELAY)

PROPAGATION DELAY: The time required for charging/discharging to change the output from logic 0 to logic 1 or vice versa is called propagation delay. propagation delay(Tpd) should be as low as possible to get fast switching speeds. CMOS is a single RC network and propagation delay of such circuit if excited by V step voltage is : tphl = ln(2) Reqn CL = 0.69 Req CL tplh = ln(2) Reqp CL = 0. 69 Req CL the total propagation delay is tp=(tphl+tplh)/2 = 0. 69(Reqn + Reqp)/2 propagation delay can be reduced in the following ways: Reduced CL : careful design of CMOS reduces diffusion and interconnection capacitances. Increase in W with cons...